KRM Korea Robot Manufacturing

블로그 인스타그램 페이스북 유튜브
사업소개 멀티미디어 사업부

KRM은 반도체 설계 전문
Fabless 회사로서
혁신적인
오토모티브 종합솔루션을 제공합니다.

  • SoC 설계

    Multimedia Core 기술과
    AP 설계기술을 바탕으로
    다양한 SoC를 제공합니다.

    자세히 보기

    1. 1. Multimedia Core
    2. Audio / Video Core
    3. JPEG Decoder
    4. USB OTG
    5. Bluetooth
    6. LVDS / MIFI / HDMI Interface
    1. 2. Algorithm Implementation
    2. Low Power / Hardwired Algorithm IPs
    3. Source Coding Implementation
    1. 3. ARM Core Architecture
    1. 4. AEC-Q100 Certification
  • BSP 개발

    오토모티브 개발 환경에 맞춘
    최적화된 BSP를 개발하고
    제공합니다.

    자세히 보기

    1. 1. Operating System
    2. Android
    3. Linux
    4. iRTOS
    1. 2. Connectivity
    2. Google Android Auto
    3. Apple CarPlay
    4. WebLink / Car life
    5. Bluetooth
    6. USB OTG
  • 오토모티브 솔루션

    SoC 공급 부터 Display Audio
    완제품까지
    차량용 인포테인먼트
    제품의 종합 솔루션을 제공합니다.

    자세히 보기

    1. 1. SoC Development
    1. 2. BSP Development
    1. 3. Ref. Solution Development
    1. 4. Quality Development
    1. 5. Original Development Manufacturing
멀티미디어 사업부

제품 소개

  • CDMP3 Audio

    Audio MP3CDP SoC Series 는 높은 가격경쟁력과 함께
    Audio CD Application 에 최적화된 솔루션을 제공합니다.

    S5L8035

    TMC688

  • Car Audio

    Disital Audio Application 에 최적화된
    Low Power MP3/WMA Decoder 로서
    Car Audio 에 최적화된 솔루션을 제공합니다.

    TMM7032

    TMC55DU

  • Display Audio

    TMM9 Series 는 Audio/Video System 과
    Smartphone Connectivity Solution 에 기반을 둔
    고성능 오토모티브 Display Audio SoC 로
    최적화된 솔루션과 높은 가격경쟁력을 제공합니다.

    TMM9200

    TMM9300

S5L8035

SoC CD MP3/WMA Decoder

Introduction

Tamul S5L8035 Audio MP3CDP SoC provides a cost-effective solution for Audio CD application. The S5L8035 SoC solution presents a rich set of features for a typical stand-alone Audio CD system: high-quality audio processing, fully embedded CD front-end (RF, servo control, and CD-DSP), up to 4megabit flash memory support. S5L8035 also includes the following components: a 16-bit CPU with 24-bit audio DSP coprocessor, SDRAM controller, EDO controller, Serial-flash controller, 4-channel timers, I/O ports, audio PWM processor, 1-channel UARTs with handshake, IIC-BUS interface, IIS interface, SPI interface, USB1.1 Host interface, SD/MMC, PLLs for clock generation.

  • S5L8035B : Basic CDMP3 & WMA Decoder SoC
  • S5L8035U : S5L8035B + USB + SD/MMC + i-pod docking
  • S5L8035E : S5L8030U + MP3 Encoder
Feature
  • Processor Architecture

    CalmADM3 MCU+DSP/ CalmRISC16: 16-bit RISC/ CalmMAC24: 24-bit DSP

  • Audio Stream Codec

    – MPEG 1/2/2.5 Layer 2/3 decoding(8k~48kHz, 2 channels, up to 320kbps)

    – WMA V4, V7, V8, V9(L1, L2) decoding/ Audio Sampling Frequency: 8~48KHz for MP3 application

  • Audio In/Output

    – Two channels audio PWM processor used as audio DAC.

  • Memory Controller

    – Supports 16-bit or 8-bit data bus width for 16M SDRAM interface. (up to 128Mbits)

    – SDRAM Interface Supports four banks, 8-bit or 16-bit data, burst(up to 16burst) mode SDRAM.

    – Supports Serial-Flash interface

  • Clock & Power Manager

    – Low power consumption

  • IIC-BUS Interface

    – IIC-BUS Interface/ UART

  • USB 1.1 Host interface

    – USB 1.1 Host interface/SD/MMC Interface/MSTICK Interface/Serial Peripheral Interface (SPI)

  • RTC

    – RTC/Watchdog Timer/IR Input/Frequency Counter/Oscillator

  • Operating Voltage

    – Core: 1.2 V

    – I/O: 3.3V

  • Operating Temperature

    – -40*C ~ 85*C

  • Operating Frequency

    – -40*C ~ 85*C

  • Operating Frequency

    – CalmADM CLK : Up to 135 MHz

    – System CLK : Up to 125 MHz

  • Package

    – 128-TQFP

TMC688

Introduction

TMC688 Audio MP3CDP SoC provides a cost-effective solution for Audio CD application. The TMC688 SoC solution presents a rich set of features for a typical stand-alone Audio CD system: high-quality audio processing, fully embedded CD front-end (RF, servo control, and CD-DSP), up to 4megabit flash memory support. TMC688 also includes the following components: a 16-bit CPU with 24-bit audio DSP coprocessor, SDRAM, Nor-flash, 4-channel timers, I/O ports, audio PWM processor, 1-channel UARTs with handshake, IIC-BUS interface, IIS interface, SPI interface, USB FS Host interface, SD/MMC, PLLs for clock generation. Especially, one newly adopted feature of TMC688 micro-architecture make the solution more cost effective. CalmADM, a cost effective MCU+DSP solution based on Samsung’s 16-bit MCU (CalmRISC16) and Samsung’s 24-bit audio DSP (CalmMAC24). CalmADM performs both system control and high quality audio processing like decoding of MP3 and decoding of WMA streams with additional special effects. Its low power and static design is suitable for power-sensitive applications.

Feature
  • Processor Architecture

    – CalmADM3 MCU+DSP solution

    – CalmRISC16: 16-bit RISC architecture

    – CalmMAC24: 24-bit DSP for audio applications

  • Supported Content

    – CD-DA, CD-MP3

  • Front-End Unit (FEU)

    – Built-in CMOS AFE, digital servo and DSP

  • Audio Stream Codec

    – MPEG 1/2/2.5 Layer 2/3 decoding(8k~48kHz, 2 channels, up to 320kbps)

    – WMA V4, V7, V8, V9(L1, L2) decoding

    – Audio Sampling Frequency: 8~48KHz for MP3 application

  • Audio In/Output

    – Two channels audio PWM processor used as audio DACMemory Controller

    – Supports 16-bit or 8-bit data bus width for 16M SDRAM interface. (up to 128Mbits)

    – SDRAM Interface Supports four bank, 8-bit or 16-bit data, burst(up to 16burst) mode SDRAM.

    – Supports Serial-Flash interface

  • Clock & Power Manager

    – Low power consumption

  • Interrupt Controller

    – 32 interrupt sources

  • General Purpose Input/Output Ports

    – 1 external interrupt port(extension possible to 4 ports)

    – Up to 36 multiplexed input/output ports

  • IIC-BUS

    – IIC-BUS / UART Interface

  • USB FS Host

    – USB FS Host / SD / MMC / MSTICK / SPI Interface

  • RTC

    – RTC / Watch dog timer / IR / Frequency Counter

  • Oscillator

    – Single 4.2336 MHz crystal clock input.

    – Oscillation Sources & PLL

  • Operating Voltage

    – Core: 1.2 V

    – I/O: 3.3V

  • Operating Temperature

    – -40*C ~ 85*C

  • Operating Frequency

    – CalmADM CLK : Up to 135 MHz

    – System CLK : Up to 125 MHz

  • Package

    – 128-QFP-1420(AN)

TMM7032

Introduction

The TMM7032 Multimedia Processor is designed to provide a cost-effective, low power and high performance Digital Audio applications such as Car Audio. To reduce total system cost, the TMM7032 integrates the following functions: an advanced Audio decoder, a control CPU with 8KB instruction/data unified caches. Also TMM7032 supports various I/F’s, USB, IIC, IIS, IR, SIO, SPDIF OUT, general purpose I/O Ports, 1-channel UART with handshake, 14-bit ADC for Audio, 4-channel Timer with PWM, audio PWM out and 2-PLLs for clock generation. The TMM7032 is fabricated in a standard 65nm CMOS technology. Its low power and static design is suitable for power-sensitive applications.

The TMM7032 is built around the ARM7 CPU core: The ARM7 cached processor provides a complete optimal performance CPU subsystem, including ARM7TDMI RISC integer CPU, 8KB instruction/data unified caches, with an AMBA bus interface. The ARM7TDMI core within the ARM7M executes both the 32-bit ARM and 16-bit Thumb instruction sets, allowing the user to trade off between high performance and high code density. It is binary compatible with ARM9TDMI, ARM10TDMI, and StrongARM processors, and is supported by a wide range of tools, operating systems, and application software.

Feature
  • 132MHz ARM7M (ARM7TDMI-S, 8KB unified cache)
  • Audio stream decoder (Audio DSP: CalmMAC24)
  • 16-bit Unified Memory Architecture for SDR
  • On-chip clock generator with PLL
  • Core peripherals (UART, I2S, I2C, SPDIF Out, IR, SPI, GPIO, USB etc.)
  • Memory card interfaces (3-in-1: Mstick, SDC, MMC)
TMC55DU

Introduction

The TMC55DU Multimedia Processor is designed to provide a cost-effective, low power MP3/WMA Decoder for Digital Audio applications such as Car Audio.To reduce total system cost, the TMC55DU integrates the following functions : MMC/SD controller, SPI(Serial Peripheral Interface) ,Master/Slave, USB 2.0 (Host).

Feature
  • Embeded 8-bit microcontroller 8051

    – Embeded 8-bit microcontroller 8051

  • MP3 Decoder

    – MPEG 1/2/2.5 Layer 2/3

  • WMA Decoder

    – Support WMA Version 4,7,8,9 (except MBR)

    – Support the high-bitrate and mid-bitrate by Microsoft from 15kbps to 320kbps like as below table.
    Sampling frequency supported : 22.05kHz, 32kHz, 44.1kHz, 48kHz

  • Volume Controller

    – Bass/Treble control

  • SPI Interface

    – Master / Slave

  • Internal DAC

    – 16-bit sigma delta stereo DAC

    – De-emphsis support Soft mute

  • USB 2.0 Host

    – Full speed (12Mbps)

  • MMC/SD/Memorystick controller

    – MMC/SD/Memorystick controller

  • I2C

    – Master/Slave

    – Hold mode support for High speed mode of version 2.0

  • 22 GPIO or Special purpose I/O

    – 22 GPIO or Special purpose I/O

  • Oscillator

    – Single 16.9344MHz crystal clock input.

    – Oscillation Sources & PLL

  • Operating Voltage

    – Core: 1.8V

    – I/O: 3.3V

  • Operating Temperature

    – -40*C -85 *C

  • Package

    – 48-TQFP-0707

TMM9200

Introduction

The TMM9200 SOC is designed to provide a cost-effective, low power and high performance Application Processor based audio/video system and smart phone connectivity solutions for automotive entertainment (AEC-Q100). To reduce the total system cost and enhance the overall functionality of the system, TMM9200 integrates the functions such as an advanced Audio/ Video decoder and a control CPU with 16KB/16KB instruction/ data caches. In addition, it supports various interfaces such as USB2.0 OTG, USB1.1 HCI, LCD, TCON, BT656, IIC, IIS, IR, SPI, SPDIF OUT, general purpose I/O Ports, 2-channel UART with handshake, 1-channel 10-bits Video DAC, 6-channel Timer with PWM, Stereo 14-bit audio DAC (Class-AB) out and three PLLs for clock generation.

Feature
  • RISC Processor Architecture

    – ARM926EJ-S based core processor

    – 16-/ 32-bit RISC architecture

  • Cache Memory

    – Supports 64 way set-associative cache with I-cache (16KB) and D-cache (16KB)

    – Supports 8-word per line with one valid bit and two dirty bits per line

    – Supports Pseudo random or round robin replacement algorithm

  • Memory Controller

    – Supports 1-/2-/4-bit serial flash interface

    – Supports 16-/32-bit data bus width for SDRAM interface

  • JPEG Decoder

    – Decoded ITU-T.81 (ISO/IEC 10918-1) compliant baseline process

    – Decodes up to maximum 65535×65535 pixel size

    – Supports variable JPEG image chroma format

    – Supports Fine zoom operation with small memory (under 1MB)

  • Multi-Format Video Decoder

    – Decodes MPEG1, MPEG2, MPEG4, H.264, VC-1, RV, and video stream

    – Error resilience tools

    – Decodes images with HD size

  • Audio Stream Decoder

    – Decodes MPEG1, MPEG2, FLAC, AAC, WMA, PCM and Real Audio (COOK)

    – Support sample rate conversion

  • LCD I/F

    – Horizontal maximum size: 1366 , Vertical maximum size: 768

    – Supported CPU, LCD and DDI Interface

  • 2-Ch Stereo Audio DAC (Class-AB)

    – Supports 95dB SNR for headphone output

    – Supports 8–96kHz sampling frequency DAC

  • USB2.0 OTG

    – Supports USB 2.0 OTG (480Mbps, on-chip transceiver)

  • Clock and Power Manager

    – Low power consumption

    – On-chip PLLs

    – Clock can be fed selectively to each function block under software control

  • Oscillator

    – Single 24MHz crystal clock input.

  • Operating Voltage

    – Core: 1.3V(412MHz)

    – I/O: 3.3V

    – SDRAM I/O: 3.3V

  • Operating Temperature

    – -40*C -85 *C

  • Operating Frequency

    – Up to 412MHz (for ARM)

    – Up to 165MHz (for SDRAM, and System Bus)

  • Supports AEC-Q100 Grade3
Applications
  • Car Audio/Video System
  • Car Display Audio System
    with the smart phone connectivity
TMM9300

Introduction

TMM9300 is a system-on-a-chip (SoC) based on the 32-bit RISC processor for Automotive Entertainment (AEC-Q100) with smart phone connectivity designed with the 28 nm low power process, features of TMM9300 include:

  • Cortex-A9 Quad core CPU
  • Highest memory bandwidth
  • Full HD display
  • 1080p 60 frame video decoding and 1080p 30 frame encoding hardware
  • 3D graphics hardware
  • High-speed interfaces such as eMMC4.5 and USB 2.0

TMM9300 uses the Cortex-A9 quad core, which is 50 % overall performance higher than Cortex-A8 core and its speed is 800MHz. It provides 6.4 GB/s memory bandwidth for heavy traffic operations such as 1080p video encoding and decoding, 3D graphics display and high resolution image signal processing with Full HD display. The application processor supports dynamic virtual address mapping, which helps software engineers to fully utilize the memory resources with ease. TMM9300 provides the best 3D graphics performance with wide range of APIs, such as OpenGL ES1.1, 2.0.Superior 3D performance fully supports Full HD display. The native dual display, in particular, supports Full HD resolution of a main LCD display and 1080p 60 frames HDTV display throughout HDMI, simultaneously. Separate post processing pipeline enables TMM9300 to make a real display scenario.

Feature
  • 28nm, HKMG (High-K Metal Gate) Process Technology
  • 513 pin FCBGA Package, 0.65mm Ball Pitch, 17x17mm Body size
  • Cortex-A9 Quad Core CPU @ 800MHz
  • High Performance 3D Graphic Accelerator
  • Full-HD Multi Format Video Codec
  • Supports various memory : x32 LVDDR3(Low Voltage DDR3), DDR3 up to 800MHz
  • Supports MLC/SLC NAND Flash with Hardwired ECC algorithm (4/8/12/16/24/40/60bit)
  • Supports Dual Display up to 1920×1080, TFT-LCD, LVDS, HDMI 1.4a, MIPI-DSI output
  • Supports 3ch ITUR.BT 656 Parallel Video Interface and MIPI-CSI
  • Supports10/100/1000M-bit Ethernet MAC (RGMII I/F)
  • Supports 3ch SD/MMC, 5ch UARTs,32ch DMAs, 4ch Timer, Interrupt Controller, RTC
  • Supports 3ch I2S, SPDIF Rx/Tx, 3ch I2C, 3ch SPI, 8ch 12bit ADC, 3ch PWM and GPIOs, 1ch PPM
  • Supports 1ch USB 2.0 Host, 1ch USB 2.0 OTG, 1ch USB HSIC Host
  • Supports Security functions (AES, DES/TDES, SHA-1, MD5 and PRNG) and Secure JTAG
  • Supports various Power Mode (Normal, Sleep, Deep-Sleep, Stop)
  • Supports various boot modes including SPI Flash/EEPROM, NOR, USB and UART
  • External Crystal : 24MHz(for PLL), 32.768Khz(for RTC)
  • Operating Conditions
    Operating Voltage TMM9300
    CORE 1.0V
    CPU 1.0V~1.125V
    DDR Memory 1.2V~1.5V
    I/O 3.3V
    Operating Voltage TMM9300
    Ambient Temp.(Ta) -40˚C ~ 85˚C
    Junction Temp.(Tj) -40˚C ~ 85˚C
    Storage Temp. Range -50˚C ~ 150˚C
    AEC-Q 100 Grade 3 Support
  • Car Audio/Video System
  • Car Display Audio System
    with the smart phone connectivity
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